Error (in some versions): "undefined reference to Xil_ICacheDisable"

Introduction

This problem happened to me more than a year ago, and I've been asked about it for several other colleagues, so I post it now.... l 

Trying of doing the simplest project ever in Vivado, using the ZedBaord, I run into a problem that made me feel very bad.... 

How can I get 10 error messages ? !? !?  from the 'Hello World' project !

Finding the Problem 

So, I followed all the steps that many of the on-line tutorials explains to build the hardware for the 'Hello World' project... here is my design: 

I did the necessary steps in Vivado to open the SDK environment. Then in the SDK, I created a new Application Project based in the Hello World template. 

When I executed Build Project for the simple Hello World project, I got the following errors: 

I did a search in the web, nothing related came out. So, I investigated on my side and I found out that there is a kind of 'bug' for this version of the Vivado, 2015.1, that even though the DDR interface is not configured in the hardware, it is generated incompletely in the software. 

Thinking on this simple project, there is no need for using the external DDR available in the ZedBoard. Therefore, there is no need for enabling the DDR controller from the Zynq configuration window. However, solve the problem that generates the error messages you do need to enable the DDR interface even though you don't do any read/write to the DDR. 

Important Note: other versions of Vivado do not generate these errors. 

Once you enable the DDR interface in the Vivado environment and go back to the SDK, create a new Hello World application project and then execute a Build Project.... no errors should be generated this time...